In order to adress the requirements of power conversion in the field of electrical vehicule or photovoltaics, high performance GaN on Silicon power devices need to be developped. Such power devices must fulfill agressive specifications in terms of threshold voltage (> 2V), nominal current (100-200A), breakdown voltage (650 and 1200V) and stability (low "current collapse", low hysteresis). Discrete cascode configuration, consisting in a combination of a low voltage E-mode Silicon die and a hihg voltage D-mode GaN/Si die in a single package, has been developped by different laboratories and companies to adress this need (Transphorm, On-Semi, NXP, IR…). However, this approach has some drawbacks like parasitic inductances, device pairing, need of additionnal protection devices, cost, temperature limitation due to the Si die... The monolithic cascode is a very compact version of the cascode configuration that will allow to avoid those problems but also to improve the performance of E-mode devices developped at Leti (MOS-channel HEMT). Indeed, some actors in the field of GaN power devices already use this configuration with another E-mode technology (p-GaN gate). Monolithic cascode device has been demonstrated recently by CEA-Leti in the frame of a PhD thesis (2014-2016) on the basis of the 200mm GaN/Si, CMOS compatible, MOS-channel HEMT technology. The aim of this post-doc is to optimize the monolithic cascode structure in terms of On-state resistance, Figure Of Merit, switching losses and high switching frequency capability in order to meet the specifications of our industrial partners.