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Gregory Di Pendina,
Ph. D. CNRS :
Centre National de la Recherche Scientific
National
Center for Scientific Research SPINTEC, UMR CEA/CNRS/UJF-Grenoble
1/Grenoble-INP Tel:
+33(0)4.38.78.47.46 |
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Dr. Gregory Di Pendina is an ASIC (Application Specific Integrated Circuit) designer specialized in non-volatile applications, based on MRAM technologies, using all generations of Magnetic Tunnel Junctions (MTJ). His background comprises full custom and digital design, Hybrid Process Design Kit (H-PDK) development, Design For Testing (DFT), integrated circuit test and characterization. His field of interest are presently mainly <radiation hardening based on MRAM non-volatile asynchronous circuits> , <MRAM-based low power digital circuits>, <ultra-fast MRAM memory based on Spin Orbit Torque MRAM>, <MRAM-based circuit security evaluation and improvment>. He received his Ph. D in 2012 from the University of
Grenoble, France, and his Master degree in 2005 from the University Joseph
Fourier of Grenoble, France. He first spent 13 years in the Circuits
Multi-Projets / Multi Project Circuits (CMP) service unit of the CNRS
offering a MPW fabrication service, as an engineer in design verification. He
has been leading research activities from 2008 to 2012, on the topics of hybrid MEMS /
CMOS fabrication and hybrid photovoltaic (PV, or organic photovoltaic (OPV)),
CMOS systems, at integrated circuit and device level. His
Ph. D. was a collaboration between CMP unit and SPINTEC Lab. Then he
joined in 2012 SPINTEC Lab as an Engineer - Researcher, involved in
several research projects as non-volatile design and test expert,
and also supervising Ph. D students and post-docs. He has been involved
in French ANR research projects as Coordinator or scientist responsible, ERC and FP7 european projects as Work Package leader, and in
eVaderis startup creation as technical support. He is author or
co-auhor of more than 70 scientific papers and owns 10 patents and 3 book
chapter contributor. His bibliography is listed below. |
Selected publications:
"Experimental analysis on stochastic behavior of preswitching time in STT-MRAM" , N. Yazigy, J. Postel-Pellerin, V. Della Marca, K. Terziyan, S. Nadifi, R.C. Sousa, P. Canet, G. Di Pendina, Microelectronics Reliability (Nov. 2022)
"Real-time switching dynamics in STT-MRAM" , N. Yazigy, J. Postel-Pellerin, V. Della Marca, K. Terziyan, R.C. Sousa, P. Canet, G. Di Pendina, IEEE Journal of the Electron Devices Society (June 2022)
"SEU Mechanisms In Spintronic Devices: Critical Parameters and Basic Effects" , O. Coi, N. Adrianjohany, G. Di Pendina, D. Dangla, R. Ecoffet, B. Dieny, L. Torres, IEEE Transactions on Nuclear Science (TNS) (May. 2021)
"Heavy-ion irradiation effects on advanced perpendicular anisotropy spin-transfer torque magnetic tunnel junction" , O. Coi, G. Di Pendina, R.C. Sousa, N. Adrianjohany, D. Dangla, R. Ecoffet, L. Torres, IEEE Transactions on Nuclear Science (TNS) (May. 2021)
"Spin-Transfer Torque Magnetic Tunnel Junction for Single Event Effects mitigation in IC design" , O. Coi, G. Di Pendina, G. Prenat and L. Torres Transaction in Nuclear Science (TNS), IEEE Journal (2020)
"Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing", G. Prenat, K. Jabeur, P. Vanhauwaert, G. Di Pendina, F. Oboril, R. Bishnoi, M. Ebrahimi, N. Lamard, O. Boulle, K. Garello, J Langer, B. Ocker, M.C. Cyrille, P. Gambardella, M. Tahoori, G. Gaudin, IEEE Transactions on Multi-Scale Computing Systems (2016)
"Radiative Effects on MRAM-Based Non-Volatile Elementary Structures,", J. Lopes, G. Di Pendina, E. Zianbetov, E. Beigne, L. Torres, ISVLSI, Montpellier, France (2015)
"Non-volatility for Ultra-Low Power Asynchronous Circuits in Hybrid CMOS/Magnetic Technology", E. Zianbetov, E. Beigne, G. Di Pendina, Asynchronous Circuits and Systems (ASYNC), Mountain View, CA, USA (2015)
"Ultra-energy-efficient CMOS/magnetic nonvolatile flip-flop based on spin-orbit torque device", G. Di Pendina, K. Jabeur, G. Prenat, Electronics Letters 50 (8), 585-587 (2014)
"Hybrid CMOS/Magnetic Process Design Kit and SOT-based Non-volatile Standard Cell Architectures", G. Di Pendina, K. Jabeur, G. Prenat, Invited paper at Asia and South Pacific Design Automation Conference (ASP-DAC), Singapore (2014)
"Spin Orbit Torque Non-Volatile Flip-Flop for High Speed and Low Energy Applications", K. Jabeur, G. Di Pendina, F. Bernard-Granger, G. Prenat, IEEE Electron Device Letters (2014)
"Study of two writing schemes for a magnetic tunnel junction based on spin orbit torque", K. Jabeur, L.D. Buda-Prejbeanu, G. Prenat, G. Di Pendina, International Journal of Electronics Science and Engineering, p. 501-507 (2013)
"Compact model of a three-terminal MRAM device based on Spin
Orbit Torque switching"
K. Jabeur, G. Prenat, G. Di Pendina, L.D. Buda-Prejbeanu, I.L. Prejbeanu, Semiconductor
Conference Dresden-Grenoble (ISCDG), 2013 International, 1-4
"STT-MRAM for Non-Volatile Logic ASIC Applications", G. Di Pendina, G. Prenat, B. Dieny, Design Automation Conference (DAC), Work-In-Progress (2013)
"Non-volatile FPGAs based on spintronic devices" O. Goncalves, G. Prenat, G. Di Pendina, B. Dieny Proceedings of the 50th Annual Design Automation Conference (DAC), 126 (2013)