Solving the problem of the energy consumption of chips to offer new levels of performance and energy efficiency.
Traditional CMOS processors, with their high power consumption and tendency to overheat, have hit a performance plateau. Nellow is developing a new generation of chips based on ferroelectric and spintronics materials, opening the door to more powerful, energy-efficient for applications like AI and computing.
New generation of chips. ©AdobeStock
Despite CAPEX and R&D investments of hundreds of billion €, and while CPU performance increased a hundredfold in the 1990’s, it increased only by a factor of 3 in the last decade.
Nellow develop a new generation of chips that take advantage of the unique properties of ferroelectric and spintronics materials to merge compute and memory, eliminate leakage current, and achieve operating voltages lower than those of CMOS chips. Power consumption could be reduced 100-fold or even more. The technology, covered by nine patents, was developed over fifteen years of research at laboratories Spintec (CEA, Univ. Grenoble Alpes, CNRS) and Albert Fert (CNRS, Thales, Univ. Paris-Saclay).
Nellow is located at the CEA. The startup’s founders participated in the Magellan incubation program and plan to continue to develop the technology in conjunction with the Spintec laboratory.
Key figure: 100
Nellow plans to slash chip power consumption by a factor of 100 even up to 1,000.
KEY Markets:
- Any kind of computing that requires high performance-to-power ratio, including AI
Technologies used:
- Non-volatile logic based on ferroelectric/spintronics transistors.
Year founded: 2024
CEA Institute: CEA-Irig