NSP: Physical compact model for stacked-planar and vertical Gate-All-Around MOSFETs
| Auteurs | Rozeau O., Martinie S., Poiroux T., Triozon F., Barraud S., Lacord J., Niquet Y.M., Tabone C., Coquand R., Augendre E., Vinet M., Faynot O., Barbe J.-C. |
| Year | 2017-0129 |
| Source-Title | Technical Digest - International Electron Devices Meeting, IEDM |
| Affiliations | CEA-Leti, Minatec Campus, Grenoble, France, CEA-INAC, Grenoble, France |
| Abstract | In this work, a predictive and physical compact model for NanoWire/NanoSheet (NW/NS) Gate-All-Around (GAA) MOSFET is presented. Based on a novel methodology for the calculation of the surface potential including quantum confinement, this model is able to handle arbitrary NW/NS cross-section shape of stacked-planar and vertical GAA MOSFETs (circular, square, rectangular). This Nanowire Surface Potential (NSP) based model, validated both by numerical simulations and experimental data, is demonstrated to be very accurate in all operation regimes of GAA MOSFETs. © 2016 IEEE. |
| Author-Keywords | |
| Index-Keywords | Electron devices, Gallium alloys, Nanowires, Surface potential, Compact model, Cross section shape, Gate-all-around, Gate-all-around MOSFET, MOSFETs, Nanowire surface, Novel methodology, Operation regime, MOSFET devices |
| ISSN | 1631918 |
| Lien vers article | Link |