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A method for fast evaluation of sharing set management strategies in cache coherence protocols

Publié le 29 mars 2018
A method for fast evaluation of sharing set management strategies in cache coherence protocols
Auteurs
Dumas J., Guthmuller E., Tortolero C.F., Pétrot F.
Year2017-0051
Source-TitleLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Affiliations
Univ. Grenoble Alpes, Grenoble, France, CEA, LETI, MINATEC Campus, Grenoble, France, CNRS, TIMA Laboratory, Université Grenoble Alpes, Grenoble, France
Abstract
With the emergence of manycore processors with potentially hundreds of processors in the embedded market, the scalability of cache coherence protocols is again at stake. One seemingly simple issue is the management of the set of sharers of a memory block, but with that many processors, it is a major bottleneck in terms of hardware resources. In this paper, we define a high level simulation method to evaluate sharing set management strategies, using memory access traces obtained through cycle accurate simulation (e.g. gem5). The goal of the method is to rank protocols based on latency, traffic and hardware cost, to help either choose an existing approach for a given application context, or evaluate new approaches. We demonstrate the applicability of our proposal by evaluating three existing scalable cache coherence protocols, obtaining results consistent with previous, low level, evaluations much more rapidly. © Springer International Publishing AG 2017.
Author-Keywords
 
Index-Keywords
Cache memory, Computer architecture, Hardware, Memory architecture, Application contexts, Cache coherence protocols, Cycle-accurate simulation, Hardware resources, High level simulation, Management strategies, Many-core processors, New approaches, Multiprocessing systems
ISSN3029743
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