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A G band +2 dBm balanced frequency doubler in 55 nm SiGe BiCMOS

Publié le 29 mars 2018
A G band +2 dBm balanced frequency doubler in 55 nm SiGe BiCMOS
Aouimeur W., Moron-Guerra J., Serhan A., Lepilliet S., Quemerais T., Gloria D., Lauga-Larroze E., Arnould J.-D., Gaquière C.
Source-TitleSiRF 2017 - 2017 IEEE 17th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
Univ. Grenoble Alpes, CNRS, IMEP-LAHC, Grenoble, France, ASYGN, 445 rue Lavoisier, Montbonnot-Saint-Martin, France, CEA-Leti, 17 rue des Martyrs, Grenoble, France, IEMN, Univ. des Sciences et Technologies de Lille 1, Villeneuve d'Ascq, France, STMicroelectronics Crolles, 820 rue Jean Monnet, Crolles, France
In this paper, a new balanced frequency doubler based on a Marchand Balun with Coupled Slow-wave Coplanar Wave (CS-CPW) lines in G band is presented and analyzed. The experimental results of the frequency doubler exhibit at 174 GHz a peak output power of +2 dBm associate with a linear conversion gain of -3.8 dB, a frequency bandwidth of 160 to 190 GHz and a DC power consumption of 25 mW. This doubler is fabricated in a 55 nm SiGe BiCMOS technology from STMicroelectronics with ft/fmax 320/370 GHz respectively and an area of 1200×700 ?m2 including the pads. © 2017 IEEE.
55nm SiGe BiCMOS, Balanced doubler, CS-CPW, G band, Marchand balun
BiCMOS technology, Frequency doublers, Monolithic integrated circuits, Silicon alloys, Balanced doubler, Balanced frequency doublers, DC power consumption, Frequency band width, G band, Marchand balun, SiGe BICMOS, SiGe BiCMOS technology, Semiconducting silicon
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