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Ultra-low power 1T-DRAM in FDSOI technology

Publié le 29 mars 2018
Ultra-low power 1T-DRAM in FDSOI technology
El Dirani H., Lee K.H., Parihar M.S., Lacord J., Martinie S., Barbe J.-C., Mescot X., Fonteneau P., Broquin J.-E., Ghibaudo G., Galy P., Gamiz F., Taur Y., Kim Y.-T., Cristoloveanu S., Bawedin M.
Source-TitleMicroelectronic Engineering
Univ. Grenoble Alpes, IMEP-LAHC, Grenoble INP Minatec, CNRS, Grenoble, France, STMicroelectronics, 850 rue Jean Monnet, Crolles Cedex, France, CEA-LETI, Minatec Campus, Grenoble, France, Univ. of Granada, Spain, Univ. of California, San Diego, United States, KIST, Seoul, South Korea
A systematic study of a capacitorless 1T-DRAM fabricated in 28 nm FDSOI technology is presented. The operation mechanism is based on band modulation. The Z2-FET memory cell features a large current sense margin and small OFF-state current at 25 °C and 85 °C. Moreover, low power consumption during state ‘1’ writing is achieved with ~ 0.5 V programming voltage. These specifications make the Z2-FET an outstanding candidate for low-power eDRAM applications. © 2017 Elsevier B.V.
1T-DRAM, Embedded memory, Fully Depleted Silicon-On-Insulator (FDSOI), Low-power, Sharp switch, Z2-FET
Memory architecture, Silicon on insulator technology, 1t drams, Embedded memory, Fully depleted silicon-on-insulator, Low Power, Z2-FET, Dynamic random access storage
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