Starting date : Jan. 2018 > Dec. 2021 Lifetime: 48 months
Program in support :
H2020-ICT-2017-1ICT-31-2017 Micro-and- nanoelectronics technologies
Status project : in progress
CEA-Leti's contact :
Didier Lattard
Yves Quéré
Project Coordinator: University of Oslo (NO)
Partners: - CEA-Leti, ( FR)
- Institut Polytechnique de Grenoble, (FR)
- STMicroelectronics, (FR)
- Integrated Dectector Electronics AS, (NO)
- IDEAS, University of Oslo, (NO)
Lund University (SE)
Target market: n/a
Publications «A Review on Opportunites Brought by 3D-Monolithic Integration for CMOS Device and Digital Circuit», F. Andrieu, P. Batude, L. Brunet, C. Fenouillet-Béranger, R. Berthelon, D. Lattard, S. Thuries, O. Billoint and M. Vinet, ICICDT’2018, Otranto, Italy, June 2018.
«3DVLSI, Technology and Application» S. Chéramy, A. Jouve, C. Fenouillet-Beranger, P. Batude, M. Vinet, S3S’2018, San Fransisco, USA, Oct. 2018.
«3DVLSI CoolCube™ MPW & design roadmap», S. Thuriès, O. Billoint, A. Makosiej, P. Vivet, E. Beigné, S. Choisnet, F. Andrieu, C. Fenouillet-Beranger, L. Brunet, P. Batude, D. Lattard, M. Mouhdach, S. Martinie, J. Lacord, G. Cibrario, S. Cheramy, M. Vinet, F. Clermidy, J.- E. Michallet, J.- R. Lequepeys, S3S’2018 – 3DVLSI Open Workshop, San Fransisco, USA, Oct. 2018.
“«Monolithic 3D : an alternative to advanced CMOS scaling, technology perspectives and associated design methodology challenges», P. Vivet, S. Thuriès, O. Billoint, S. Choisnet, D. Lattard, E. Beigné, P. Batude, ICECS’2018, Bordeaux, France, Dec. 2018.
«Breakthroughs in 3D Sequential technology», L. Brunet, C. Fenouillet-Beranger, P. Batude, S. Beaurepaire, F. Ponthenier, N. Rambal, V. Mazzocchi, J.-B. Pin, P. Acosta-Alba, S. Kerdiles, P. Besson, H. Fontaine, T. Lardin, F. Fournel, V. Larrey, F. Mazen, V. Balan, C. Morales, C. Guerin, V. Jousseaume, X. Federspiel, D. Ney, X. Garros, A. Roman, D. Scevola, P. Perreau, F. Kouemeni-Tchouake, L. Arnaud, C. Scibetta, S. Chevalliez, F. Aussenac, J. Aubin, S. Reboh, F. Andrieu, S. Maitrejean, M. Vinet, IEDM’
Investment: € 3.8 m.
EC Contribution: € 3.8 m.
| Stakes
During the first two years of the 3D-MUSE project, 2 prime contributions have been made in the fields of 3D sequential technology and Process Design Kit (PDK) development.
The milestone in process integration is validation of analog layer stability. This means that CEA-Leti CoolCubeTM technology is now compatible with analog or digital partitioning and MOS analog device specification is achieved.
The milestone in PDK development is availability of a complete Electronic Design Automation (EDA) environment for designing proof-of-concept technological and application test vehicles.This environment has been deployed across all our partners involved in the test chip design.
The attached figure shows the 3D sequential technology stack and the design environment for the 3D-MUSE proof of concept.
- The Internet of Things (IoT) is composed of connected devices that are characterized by their interaction with the environment via a plethora of sensors and actuators. The trend is towards ever more complex interactions and therefore more sensors of different types integrated into the same product, which requires, in turn, the processing capability to handle all the sensors.
At the same time, these systems are expected to continue performing at an ever lower power budget, preferably as low as to be able to operate purely from power scavenging. The cost also needs to be moderate. The electronics at the heart of such a system needs to be mixed-signal electronics interfacing with analog sensors and actuators but it must also supply the necessary digital processing power.
3D-MUSE is spearheading the progression from what we refer to as ‘systems-in-stack’ to true ‘systems-incube’ enabled by monolithic/sequential 3D integration. The former is defined as a 3D system characterized by locating functional blocks within a single plain in the (typically parallel/wafer-bonding) 3D integration stack, while the latter offer freedom of interconnect density in the third dimension of sequential 3D integration by implementing functional blocks in a volume of multiple tiers. We have demonstrated this concept by designing novel architectures for micro-circuits in a volume using a two tier, 3D sequential integration process. We have identified mixed-signal circuits as a major bottleneck in functional performance scaling of sensor nodes and smart sensors in IoT and cyberphysical systems. But they are also excellent candidates for beneficial trade-offs, when implemented as circuits in a volume by using two specialize tiers, one for analog device options and the other for optimal digital designs. We refer to such a technology as ‘multiprocess’ sequential 3D integration.
IMPACT
Multiple actions have been undertaken to dessiminate and promote 3D sequential (CoolCubeTM) technology developed by CEA-Leti; a number of keystone publications are listed below. CEA-Leti has take, part in several conferences and workshops and has published technical and survey articles. Several world leaders in the semiconductor field (IDM, fabless, EDA vendors, etc.) have been contacted.
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