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on-irradiation-induced Si nanodot Self-Assembly for Hybrid SET-CMOS Technology. The aim of the IONS4SET project was to create single electron transistors for ultra-low power electronics so that the component using these optimized transistors delivers good performance at very low energy consumption. This type of transistor requires fabrication of nanopillars well beyond the state of the art, which implement a process compatible with the semiconductor industry (CMOS).
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The SET was a 10 - 12 nm diameter Gate-All Around (GAA) nanopillar with a 6 nm embeddedgate oxide (SiO2) layer. In this layer, a single 2 -3 nm diameter silicon quantum nanodot (ND) wasformed by Si+ ion implantation. During an annealing step, this silicon underwent phase separation and self-assembled into the ND. The bottom of the nanopillar was contacted electrically using the top-Si of an SOI advanced substrate.
Using the 200 mm silicon platform, CEA-Leti patterned < 30 nm diameter nanopillars, whileensuring the deposition, implantation and annealing steps for integration reasons. 20 nm diameter, 70 nm high nanopillars were created by Electron Beam Direct Write (EBDW) and etched using a standard trilayer stack. We delivered wafers to the project partners for dicing, advanced characterization and electrical integration. Energy-Filtered Transmission Electron Microscopy (EFTEM) showed that the pillars were the right size and contained a single silicon ND in the embedded oxide.
CEA-Leti also investigated Directed Self-Assembly (DSA) of Block CoPolymers (BCP) as lithography for forming nanopillars. The first method involved forming PMMA contacts using a DSA contact shrink approach based on a PS-b-PMMA BCP. Sequential infiltration synthesis (SIS) was performed: Atomic Layer Deposition (ALD) was used to replace the PMMA with alumina (Al2O3), thus forming a hard mask for pillar patterning. The second method involved a PS-b-PMMA block copolymer with an inverse matrix for forming hexagonally organised sub-20 nm PS cylinders using a trilayer stack.
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