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CEA-Leti, CEA-List and PSMC Collaborate to Integrate RISC-V and MicroLED Silicon Photonics into 3D Stacking and Interposer for Next-Generation AI

​The two flagship institutes of the French Alternative Energies and Atomic Energy Commission (CEA) are global innovation leaders in microelectronics and intelligent digital systems​

Publié le 3 avril 2026

GRENOBLE, France – April 3, 2026 – CEA-Leti, a world-leading micro & nanotechnologies research institute, and CEA-List, a specialist in smart digital systems, today announced a strategic collaboration with Powerchip Semiconductor Manufacturing Corporation (PSMC). The collaboration will leverage CEA-List's RISC-V design expertise and CEA-Leti's silicon photonics expertise to introduce high-bandwidth communication and high-efficiency computing technologies into PSMC's established 3D stacking and interposer platforms to deliver solutions for next-generation artificial intelligence (AI) systems.

The semiconductor industry faces mounting challenges, including the physical limits of traditional copper interconnects, increasingly stringent power budgets, and the urgent need for flexible, scalable computing architectures. By integrating short-reach, high-bandwidth optical links for energy-efficient data movement and customizable RISC-V processor architectures, the collaboration directly addresses these constraints and establishes a new paradigm in high-performance data transport and computing architecture.


“RISC-V is transforming processor design by combining openness, flexibility, and cost efficiency. Its customizable architecture allows industrial players to develop solutions tailored to their needs," said Olivier Thomas, Deputy Head of the Digital IC Design Division at CEA-List. “Our joint effort will give customers a customizable compute platform that meets the performance and power targets."
“In the collaboration, microLED is a critical enabling technology that will boost optical-communication throughput using low-power GaN LED solutions," added Sébastien Dauvé, Chief Executive Officer of CEA-Leti.
“This collaboration enriches PSMC's 3D stacking and interposer technology envelope with high-efficiency RISC-V computing IP and high-bandwidth silicon photonics chiplet communication. By leveraging the expertise of CEA-Leti and CEA-List alongside PSMC's technologies, we will provide foundry services to customers for next-generation AI applications," said Dr. Shou-Zen Chang, Chief Technology Officer of PSMC.​


Credit : P Despesse -​ CEA​


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