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Energy Efficiency

Energy Efficiency

ICT energy efficiency is one of the major challenges of our time. According to the worst scenario, ICTs could represent up to 51% of the world's energy consumption and 23% of greenhouse gases in 2030. 

Published on 28 February 2017

Energy efficiency at the device, chip, and board and system level: ensuring the most efficient use of energy resources

ICT energy efficiency is one of the greater challenges of our time. According to worst case scenarios, ICTs could represent up to 51% of the world's energy consumption and 23% of greenhouse gases in 2030. 

Energy consumption of high-performance computer systems, already at 20 MW, is a major technological and economic issue. To compensate the increase in power consumption of mobile devices that accompanies the increase in  their computing capacity, long term research is ongoing to improve battery performance. Short term solutions must thus include drastically lowering the energy budget of intelligent systems used in the Internet of Things (IoT) to guarantee operation below 1 mW. This includes lowering standby power consumption, as IoT devices operate at very low duty cycles. Rethinking the whole family of technologies, from devices to applications, will allow us to meet these challenges and maximize energy efficiency.

Leti is developing technologies and architectures to address ICT power management such as low-power CMOS(FD-SOI, TFET, etc.)neuromorphic circuits based on m memories, computation modules based on 3D integration and silicon-based photonics, stacked intelligent 3D imagers, etc. The capacity of both hardware and software to adapt dynamically to environmental conditions and different application requirements is also under study to curtail energy waste.



Click to enlarge 

​Multi-core module based on a 3D interposer and FD-SOI chiplets ​Multi-core architecture based on a Silicon Photonics electro-optical interposer Photograph of a 28 FDSOI based DSP VLIW functioning at 460MHz 

Eye diagram of an optical modulator amplifier functioning at 10Gbps
Related publications in scientific reports:
[1]Beigné, E.; n, A.; Miro-s, I.; Wilson, R.; Flatresse, P.; Abouzeid, F.; Benoist, T.; Bernard, C.; Bernard, S.; Billoint, O.; Clerc, S.; Giraud, B.; Grover, A.; Le z, J.; Noel, J.-P.; Thomas, O. & Thonnart, Y. (2015), 'A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP g FMAX Tracking', IEEE Journal of Solid-State Circuits 50(1), 125-136

[2] Belleville, M.; Thomas, O.; n, A. & y, F. (2013), 'Designing digital circuits with nano-scale devices: Challenges and opportunities', Solid-State Electronics 84, 38-45

[3] Resistive Memories for Ultra-Low-Power embedded computing design, E Vianello, O Thomas, G Molas, O Turkyilmaz, N ć, D Garbin, .et al. , Electron Devices Meeting (IEDM), 2014 IEEE International, 6.3. 1-6.3. 4