May 20, 2026 10:00
Session 1

Victor Sabiá Pereira Carpes
​

Cryogenic RF Characterisation of Passive Components for VCO and PLL Design in P28 FD-SOI for Quantum Computing Applications​

May 20, 2026 11:30
Session 2

Maxime Sauvagnac

BOX CREEP: A Mechanical Booster for Next-Generation FDSOI

May 20, 2026 11:50
Session 2

Quentin Guillet

Strain engineering of thin monocrystalline Si films on 8-inch wafers using Surface Activated Hot Bonding​

May 20, 2026 12:10
Session 2

Alexandre Vernhet

Impact of source/drain dopant implantation and spikeannealing on electrical parameters of 25 nm FDSOI n-MOSFETs

May 20, 2026 15:10 
Session 3

Sylvain Beaurepaire

Mandrel material selection as prerequisite for SADP implementation at the 10 nm FD-SOI node

May 21, 2026 10:00 
Session 5

Rihab Chouk

In-depth TCAD study of stacked MoS₂ channel FETs based on a channel-last integration

May 21, 2026 12:30
Session 6

Fatima Zahrae Tijent

Understanding room-temperature electrical characterizations of FDSOI spin qubit devices via TCAD simulations

May 21, 2026 15:10​
Session 7

Yinyin Zhang Fu

Reduced metal gate height and in-situ doped faceted raised source and drain regions for advanced RF FD-SOI devices​

May 21, 2026 16:10​
Session 7

Emmanuel Petitprez​

Punch-Through Failure Mitigation in Advanced FD-SOI Nodes​​

May 21, 2026 12:15​
Session 9

Yusra Rachidi​

Split MLP Architectures for Accurate Joint Modeling of drain and gate currents in FD-SOI Transistors​

POSTER
P 7

Antoine Faurie

​A Scalable Time-Multiplexed Biasing Architecture for FDSOI Spin Qubits