Evaluation of ONO compatibility with high-k metal gate stacks for future embedded flash products
| Description | |
| Date | |
| Authors | Dobri A., Morillon D., Jeannot S., Piazza F., Jahan C., Toffoli A., Perniola L., Balestra F. |
| Year | 2017-0310 |
| Source-Title | Joint International EUROSOl Workshop and International Conference on Ultimate Integration on Silicon-ULIS, EUROSOI-ULIS 2017 - Proceedings |
| Affiliations | STMicroelectronics, France, CEA, LETI, Grenoble, France, IMEP-LAHC, Université Grenoble Alpes, Grenoble, France |
| Abstract | Embedded flash memories having high-k metal gate-based logic devices will require modifications to the flash cells in order to remain economically feasible. One potential integration scheme is to keep the traditional ONO layer as the flash cell's inter-gate dielectric and replace its poly-Si control gate with the same high-k metal gate stack used for the logic devices. Preliminary electrical tests show that an HfSiON/TiN/a-Si gate stack does not significantly impact the EOT or leakage properties of the ONO layer. This stack is more robust than the traditional ONO with a poly-Si gate. © 2017 IEEE. |
| Author-Keywords | embedded flash, high-k metal gate, nonvolatile memory, ONO |
| Index-Keywords | Flash memory, Gate dielectrics, High-k dielectric, Integration, Logic devices, Logic gates, Metals, Polycrystalline materials, Electrical tests, Embedded flash, Embedded flash memory, HIGH-K metal gates, Integration scheme, Leakage property, Non-volatile memory, Poly-si gates, Computer circuits |
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| Link | Link |