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A 15-21 GHz I/Q Upconverter With an On-Chip Linearization Circuit for 10 Gbps mm-Wave Links

Published on 29 March 2018
A 15-21 GHz I/Q Upconverter With an On-Chip Linearization Circuit for 10 Gbps mm-Wave Links
Description
 
Date 
Authors
Del Rio D., Gurutzeaga I., Rezola A., Sevillano J.F., Velez I., Puyal V., Gonzalez-Jimenez J.L., Berenguer R.
Year2017-0220
Source-TitleIEEE Microwave and Wireless Components Letters
Affiliations
Ceit, San Sebastian, Spain, Tecnun (University of Navarra), San Sebastian, Spain, CEA, LETI, MINATEC Campus, Grenoble, France, University of Grenoble Alpes, Grenoble, France
Abstract
This letter presents a 15-21 GHz I/Q upconverter, based on two Gilbert-cell mixers with an on-chip wideband linearization loop that extends the linear region and allows power efficient operation at backoff power levels. A quadrature LO signal is generated using an integrated two-stage polyphase filter. Measurements show a conversion gain of -5.5 dB, an output 1-dB compression point of 0 dBm, and an image suppression of 40 dB over the 6-GHz output bandwidth. An error vector magnitude of 3.5% is obtained for a 10-Gb/s 64-QAM signal with a bandwidth of 2 GHz. The circuit is integrated in a 55-nm BiCMOS process and occupies 1.07 mm2. The dc power consumption is 61 mW. © 2017 IEEE.
Author-Keywords
64-QAM, I/Q modulator, K-band, Mixer, RF integrated circuits
Index-Keywords
Bandwidth, Bandwidth compression, Linearization, Millimeter waves, Timing circuits, 1dB compression point, DC power consumption, Error vector magnitude, Gilbert Cell mixers, Image suppression, Linearization circuit, Poly phase filters, Wideband linearization, Microwave circuits
ISSN15311309
LinkLink

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