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Enhanced security for processors cache memories
Cache memories reduce the access time between the main memory and the processor. They are vulnerable to cache timing attacks, which can be used to obtain sensitive data or encryption keys. ScrambleCache is a hardware countermeasure that improves the two most commonly used security mechanisms: randomization and cache partitioning. Its efficiency was proven by using a write-through cache memory. It was demonstrated using FPGA with the RISC-V CVA6 processor and two patents were filed.
ScrambleCache is suitable for all processors that use cache memory, especially those found in:
• Personal and professional computers
• Automobile ECUs
• Medical devices
• Industrial electronics
These devices manage sensitive data and can be subject to targeted attacks through software side-channel attacks also called cache timing attacks.
A. Jaamoum, T. Hiscock, G. Di Natale ”Scramble Cache : An Efficient Cache Architecture for Randomized Set Permutation“, DATE Conference 2021
CEA is a French government-funded technological research organisation in four main areas: low-carbon energies, defense and security, information technologies and health technologies. A prominent player in the European Research Area, it is involved in setting up collaborative projects with many partners around the world.