You are here : Home > Feb.27 - Mar.03 2017 ​Leti will present its latest results in these approaches for fabricating advanced CMOS and silicon photonics devices and sensors in several papers

SPIE Advanced Lithography Conference

From 2/26/2017 to 3/2/2017
 San Jose, California

​Leti will present its latest results in these approaches for fabricating advanced CMOS and silicon photonics devices and sensors in several papers at the SPIE Advanced Lithography conference .

Leti presentations at SPIE includes : 

Invited paper
  • Advanced Etch Technology for Nanopatterning VI (Conference 10149)
Session 6: Novel Plasma Patterning Techniques
“Nanoimprint, DSA and Multi-Beam Lithography: Patterning Technologies with New Integration Challenges” 
Paper 10149-20
4:10 pm - 5:50 pm
Feb. 28, Marriott, San Jose Salon III

Joint papers
  • Emerging Patterning Technologies 2017 (Conference 10144)
Session 3: Nanoprint Masks and Applications
“New 3D structuring process for non-integrated circuit related technologies” 
Paper 10144-11 
11:20-11:40 am
Feb. 28
Convention Center 210B

  • Session 5: Direct-Write, Maskless Lithography
“Overlay performance of MAPPER's FLX-1200” 
Paper 10144-22
5:10-5:30 pm
Feb. 28
Convention Center 210B

  • Session 6: DSA Process and Integration
“Advanced surface affinity control for DSA contact hole shrink”
Paper 10144-23
8:50-9:10 am 
March 1 
Convention Center 220C

  • Session 11: DSA Novel Materials
“A track process for solvent annealing of high-χ BCPs” 
Paper 10146-31
Time: 2:30-2:50 pm
March 1
Convention Center 220C

  • Session PSTue
6:00-8:00 pm
Feb. 28
Convention Center Hall 2

- “DSA Materials In-Film Defectivity Advanced Investigation”
- “DSA Process Window Extension Via Controlled Atmospheric Conditions Through Accurate Defectivity and Roughness Measurements” 
- "The 300mm Evaluation of a 38nm Period Lamellar PS-b-PMMA for L/S Applications with Graphoepitaxy”
- “Rules-Based Correction Strategies Setup on Sub-Micrometer Line and Space Patterns for 200mm Wafer Scale SmartNILTM Process within an Integration Process Flow”



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