EVENT
 
   
      Discover CEA-Leti’s latest results in RFIC design 
 The RF Architecture & IC Design Lab at CEA-Leti is proud to once again participate in the IEEE European Solid-State Electronics Research Conference (ESSERC 2025), contributing as a Technical Program Committee member, organizing and speaking at a workshop, and presenting four remarkable scientific papers.
  
Discover CEA-Leti's major scientific results
With 4 papers, the institute will present this year’s major scientific results at ESSERC, including the following topics: 
- Wi-Fi Power Amplifier 
- sub THz source with on-chip antenna
- Advanced memory devices
 
- Innovation in RF and power components
 
 
      
   
CEA-Leti scientific papers
Session name: Power amplifiers for communications
 Ayssar Serhan, Pascal Reynier, Alexandre Giry, Mehadi Otmani
A Wideband Class-E Wi-Fi Power Amplifier using Scalable Transformer-Based Output Network
Session name: Transceiver for sensing and communications
 Mehmet Aylar, Alexandre Siligaris, José Luis Gonzalez-Jimenez, Benjamin Blampey 
A 282 GHz lens free source with on-chip antenna in 45 nm CMOS SOI
Session name: Advanced Memory Devices
 Renzo Antonelli, Oumaima Daoudi, Guillaume Bourgeois, Antoine Salvi, Sylvain Gout, Mathieu Bernard, Leïla Fellouh
Sb/Te Ratio Engineering in Phase-Change Memory for High SET Speed and Large Memory Window
  
         
Session name: Innovations in RF and Power Components
 Lucas Nyssens, Bruno Reig, Jose Lugo, Vincent Puyal, Clémence Héllion, Marjolaine Allain, Joey Denizart 
Analysis of Substrate Impact on SP3T Switch in Phase-Change Material Technology
 
 Dive deeper into shaping the future through innovations in RF and mm-wave design and technology 
 During the workshop "Shaping the Future Through Innovations in RF & mm-Wave Design and Technology", co-organized by CEA-Leti (Dr. Dominique Morche), Fraunhofer EMFT (Dr. Erkan Isa), and IMEC (Björn Debaillie), Dr. Baudouin Martineau from CEA-Leti will present a talk titled:"Advancing CMOS-SOI Technologies for mm-Wave and RF Applications: A Bottom-Up Approach to Integrated Circuit Design and System Innovation."This workshop talk will explore the potential of CMOS FD-SOI technologies beyond traditional low-power applications, highlighting how innovative design strategies can enable high-performance and high-power RF solutions. 
ABOUT IEEE European Solid-State Electronics Research Conference
 ESSERC (European Solid-State Electronics Research Conference) unites the legacy of ESSDERC and ESSCIRC—launched in 1971 and 1975 respectively—into a single annual European forum. It fosters collaboration between technologists and circuit designers, reflecting the growing need to integrate device and circuit innovation for advanced system-on-chip applications. The inaugural ESSERC took place in Bruges in 2024, continuing a 50-year tradition. With a unified structure and focus on both solid-state devices and circuits, ESSERC addresses the increasing complexity of semiconductor technologies through cross-disciplinary dialogue and research exchange. 
 
          More information on ESSERC's website
More information on ESSERC's website