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EU project to present latest on technology andarchitecture developpement for brain-inspired ICs

GRENOBLE, France – Sept. 6, 2016 – An international project to develop technology and architectures
for mimicking neural behavior in integrated circuits will review the state of the art in creating
neuromorphic circuits and bring together the device and design communities for this promising field on
Sept. 12 in Lausanne, Switzerland.
Published on 6 September 2016

The workshop during ESSDERC/ESSCIRC 2016 is organized by the NeuRAM3 project, which derives
its name from “neural-computing architectures in advanced monolithic 3D VLSI technologies”. It will
feature speakers from different EU and international programs and groups involved in development of
neuromorphic electronics to present and discuss recent advances in the field.
NeuRAM3, a three-year EU project, includes teams from CEA Tech institutes Leti and List (F),
STMicroelectronics (F), IBM Zurich (SUI), University of Zurich (SUI), CNR-IMM (I), imec (NL, B), Jacobs
University (D), and IMSE-CISC (ESP). It was launched this year to realize a chip implementing a
neuromorphic architecture that supports state-of-the-art machine-learning algorithms and spike-based
learning mechanisms.

“Neuromorphic computing is based on mimicking the processes of the brain in a very simplified
manner,” said Carlo Reita, director technical marketing and strategy, nanoelectronics at Leti, which is
coordinating the NeuRAM3 project. “In the brain, connections between neurons get reinforced –
meaning better synapse connections – when there is a temporal correlation between signals coming
into the neurons.

“In this project, we are trying to mimic this behavior using not software programming in conventional
computers, as in state-of-the-art deep-learning machines, but by using time-domain electrical spikes in
a dedicated analog/digital circuit,” Reita said. “The circuits are designed to take advantage and ‘learn’
using the properties of some materials and components integrated in the circuit.”

Specific project goals are:
  • Developing ultra-low power, scalable and highly reconfigurable neural architecture
  • Delivering a 50x improvement in power consumption compared to conventional digital solutions
  • Fabricating a monolithic 3D technology in FDSOI at 28nm with integrated RRAM synaptic

“With FDSOI, the project is aiming at ultra-low-power embedded circuits for distributed processing in
the IoT and sensor systems,” Reita said.

Workshop presenters will offer a variety of approaches to implementing synaptic devices, neurons and
different circuit architectures. Speakers and topics include:
  • Carlo Reita, Leti, introduction
  • Jean Fompeyrine, IBM – Zurich, chair Part 1
  • Prof. Luping Shi, Tsinghua University, China, title to be confirmed
  • Prof. Peter Bienstman, University of Ghent, Belgium, “Photonic Reservoir Computing Using Silicon Chips” 
  •  Prof. Byoung Hun Lee, GIST, Korea, “Neuromorphic Hardware Development in Korea” Dominique Thomas, STMicroelectronics, France, chair Part 2
  • Dr. Geoffrey Burr, IBM – Almaden, USA, “Neuromorphic Technologies for Next-Generation Cognitive Computing” 
  • Prof. Shimeng Yu, Arizona State University, USA, “Scaling-up Resistive Synaptic Arrays for Neuro-inspired Architecture: Challenges and Prospects” 
  • Dr. Julie Grolier, Thales-CNRS, France, “Brain-inspired Computing with Ferroic Nanodevices” Sabina Spiga, CNR-IMM, Italy, chair Part 3 
  • Prof. Yusuf Leblebici, EPFL, Switzerland, “Design and Co-integration of Memristive Crossbar Arrays with CMOS R/W Access” 
  • Dr. Barbara De Salvo, Leti, France, “Taking Inspiration from the Brain to Design Neuromorphic Circuits Based on Novel Technologies” 
  •  Prof. Giacomo Indiveri, INI-UTH, Switzerland, “Distributed Heterogeneous Memory Structures in Multi-core Neuromorphic Computing Architectures” 
  • Dr. Soeren Steudel, imec-NL, Netherlands, “Reconfigurable Neuromorphic Synapse Interconnects with TFT” 

Workshop Registration:

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