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Published on 7 December 2023
Research FieldUltra-divided matter, Physical sciences for materials

Domaine-SMaterials and applications

ThemeCondensed matter physics, chemistry & nanosciences

Theme-SEngineering sciences

Ultra-divided matter, Physical sciences for materials Condensed matter physics, chemistry & nanosciences Materials and applications Engineering sciences DRT DPFT SDEP LDJ Grenoble
Silicon nanowire elaboration for microelectronic applications
In order to realize high capacity integrated capacitor, one approach consists in developing electrode with high specific surface. In this work, we propose to perform capacitor integrating silicon nanowires. The first part of this study will be devoted to the understanding and to the optimization of Si nanowires CVD growth process. In parallel, properties of nanowires obtained by electrochemical silicon etching will be assessed and will be compared to CVD nanowires characteristics. According to the electrical performances, different strategies (metallization Silicuration…) will be envisaged in order to enhance their electrical conductivity.
Département des Plateformes Technologiques (LETI) Service des procédés de Dépôts Laboratoire
JOUSSEAUME Vincent CEA DRT/DPFT/SDEP/LDJ 17, Avenue des Martyrs 38054 Grenoble cedex 9 0438789522
Start date1/9/2010

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