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Published on 7 December 2023
Research FieldComputer science and software


ThemeEngineering sciences


Computer science and software Engineering sciences DRT DACLE LaSTRE Saclay
Design of a safe and secure hypervisor in the context of a manycore architecture
The TSUNAMY project aims at thinking the design of future manycore chips in a collaborative hardware/software approach. It will investigate how crypto-processors can be incorporated into such a chip, turning it into a heterogeneous architecture, where scheduling, resource allocation, resource sharing, and resource isolation will be a concern. The LaSTRE laboratory has designed Anaxagoros, a micro-kernel which ensures good properties in terms of safety and integration of mixed-criticality applications and is therefore well suited to the virtualization of operating systems. Making this virtualization software layer evolve in the context of the TSUNAMY project is the main goal of this post-doctoral proposal. The first issue to address deals with the scalability of Anaxagoros on a manycore architecture. This system was designed with multicore scalability in mind : to help reach the highest level of parallelism in a lock-free fashion, innovative techniques were proposed to minimize the amount of synchronization points within the system. This is the first step, but scaling to manycore architectures brings new topics such as cache-coherency or non-uniform memory access that require to focus on data locality as well. The second challenge will be to incorporate genuine security features into Anaxagoros, e.g. regarding protection from covert channels, or confidentiality. The third and final challenge that will be addressed through interactions with the partners of the project is to devise techniques that could be implemented directly in hardware in order to ensure that even a breach in what is usually considered as trusted software will not allow an attacker to gain unprivileged data access or let information leak.
Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratoires des fondements des systèmes Temps réel Embarqués
HERVE Julien CEA DRT/DACLE//LaSTRE CEA Saclay Nano-INNOV Institut Carnot CEA LIST DACLE/LaSTRE - Point Courrier 172 91 191 Gif s/Yvette CEDEX 0169085156
Start date1/3/2014

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