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Process modules for GeSn nanoelectronics with high Sn-contents

Published on 29 March 2018
Process modules for GeSn nanoelectronics with high Sn-contents
Schulte-Braucks C., Glass S., Hofmann E., Stange D., von den Driesch N., Hartmann J.M., Ikonic Z., Zhao Q.T., Buca D., Mantl S.
Source-TitleSolid-State Electronics
Peter-Gruenberg-Institute 9 (PGI-9) and JARA-FIT, Forschungszentrum Juelich GmbH, Juelich, Germany, University of Grenobles Alpes, France, CEA, LETI, MINATEC Campus, Grenoble, France, Institute of Microwaves and Photonics, School of Electronic and Electrical Engineering, University of Leeds, Leeds, United Kingdom
This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0–14.5 at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge0.87Sn0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices. © 2016 Elsevier Ltd
GeSn, High-k/metal gate, MOSFET, NiGeSn
Capacitance, Field effect transistors, Germanium, Schottky barrier diodes, Tin, Capacitance-voltage characteristics, GeSn, High-k/metal gates, Indirect bandgap semiconductors, MOS-FET, Negative differential resistances, NiGeSn, Temperature dependent I-V characteristics, MOSFET devices

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