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Technological and architectural approaches to neuro-inspired circuit implementations

Published on 29 March 2018
Technological and architectural approaches to neuro-inspired circuit implementations
Description
 
Date 
Authors
Reita C.
Year2017-0377
Source-Title2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
Affiliations
CEA-LETI, 17 rue des Martyrs, Grenoble Cedex 9, France
Abstract
Research activities in the field of brain-inspired computation have gained a large momentum in recent years While most of the attention is being directed to implementation of Deep Learning algorithms in large computing system, the impact on device and circuit technology has been mixed. On one hand advanced standard CMOS technology has been used to develop GPU and specific circuit accelerators without making use of any bio-inspired data coded hardware. On the other, emerging resistive memory devices (RRAMs) are considered good candidates to emulate the biologically plausible synaptic behavior at nanometer scale, because of the fact that they offer the possibility to modulate their conductance by applying low biases, and can be easily integrated with CMOS-based neuron circuits in a back-end process. This has opened the way to the realization of compact and energy-efficient computing architectures based on artificial neural networks (ANNs) but that have been restricted mostly to the research community mostly due to the insufficient maturity of the technology. © 2016 IEEE.
Author-Keywords
 
Index-Keywords
CMOS integrated circuits, Computer architecture, Energy efficiency, Neural networks, Random access storage, Timing circuits, Architectural approach, Circuit implementation, Circuit technology, Energy efficient computing, Large computing systems, Research activities, Research communities, Standard CMOS technology, Brain
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