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Insulated recessed gate GaN power transistors enable promising normally-OFF architecture

​​​​​​​​​​​The size, energy efficiency, reliability, and integration requirements for power components are tougher than ever, and the search for breakthroughs that will lead to more advanced normally-OFF architectures for a wide variety of markets is underway. CEA-Leti and STMicroelectronics made advances on an insulated recessed-gate GaN (gallium nitride) power transistor that will improve device reliability.​​

Published on 21 February 2024

Fully-recessed MIS gates could solve GaN power transistor overvoltage reliability problems​

According to the Yole Group's Power GaN 2022 report , the GaN power component market is expected to see double-digit growth over the next several years. As costs come down and performance improves, GaN devices will make increasing inroads into the consumer power supply, automotive, and telecoms/datacoms markets, the report posits. Although GaN-on-Si power transistors offer smaller devices and higher power densities than silicon MOSFETs, the conventional p-GaN gate architecture is plagued by reliability issues, not least of which is a tendency to fail under even slight overvoltages. Fully-recessed MIS gate GaN power transistors also offer a wider gate voltage swing and lower gate leakage current than silicon MOSFETs, making them a promising solution. CEA-Leti contributed to a number of advances with STMicroelectronics that will help position the semiconductor giant to better address the booming power GaN market.

Review paper highlights a series of recent advances in fully-recessed MIS gate structures

There are a number of challenges to harnessing all the advantages of insulated recessed-gate transistors. A primary concern is the optimization of interfaces between the insulator and AlGaN/GaN to minimize interface trapping states and enhance current flow. Controlling the insulator charge is also crucial. The most recent developments in manufacturing processes have focused on:

  • Wet cleaning, thermal treatment, and plasma treatment to obtain a higher-quality surface.
  • Low-impact etching and atomic layer etching (ALE) for the gate recesses.
  • Interfacial layers (AlN, in this case) to further reduce power losses.
  • Alternative materials for thin film dielectric layers to improve reliability


All of these process steps—from surface preparation to etching and the deposition of the dielectric layer—must be carefully controlled to obtain the desired device specifications. Proper characterization of the damage induced by plasma-assisted etching and industrially-viable process integration present additional challenges that must still be addressed.

The outlook for power electronics

Insulated recessed-gate GaN power transistors have the potential to redefine power conversion systems for solar panels, on-board chargers, USB-C chargers, and data centers. The innovative transistors developed by CEA-Leti, CNRS, and STMicroelectronics harness cutting-edge etching and dielectric deposition techniques and will position STMicroelectronics to drive adoption of its power GaN products by these markets.

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