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A new generation of transistors now in labs

​For the first time ever, CEA-Leti, a CEA Tech institute, fabricated nanosheet transistors with seven levels of stacked silicon channels. This advance will pave the way to smaller, more powerful, and energy-efficient devices.

Published on 31 August 2020

​Gate-all-around (GAA) architectures are in the running to replace FinFET transistors. They have the potential to enhance the performance of today's electronic components and make them more energy efficient. High performance computing (HPC), smartphones, and laptop computers could all potentially benefit from GAA architectures. In a world first, CEA-Leti successfully tested a demonstrator with seven levels of stacked silicon channels, far more than the usual three levels.

CEA-Leti researchers had to overcome several technical challenges to fabricate the seven-level device. They were able to improve the fabrication processes to push the architecture to its limits: The seven levels of stacked silicon channels represent more than twice as many as the current state of the art, with widths ranging from 15 nm to 85 nm.

The demonstrator was fabricated with a gate-last process that made it possible to utilize industrial CMOS processes developed for FinFET. A virtual presentation of the architecture and the performance of the transistors built was given at the VLSI 2020 conference.

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